Mamdouh, M. Mjema, G. Yemiscioglu, S. Kondo and A. Muhtaroglu, "Design of Efficient AI Accelerator Building Blocks in Quantum Dot Cellular Automata (QCA)," in IEEE Journal on Emerging and Selected Topics in Circuits and Systems, 2022, doi: 10.1109/JETCAS.2022.3202043.
S. Mohaghegh, S. Kondo, G. Yemiscioglu and A. Muhtaroglu, “A Novel Multiplier Hardware Organization for Finite Fields defined by All-One Polynomials," in IEEE Transactions on Circuits and Systems II: Express Briefs, 2022, doi: 10.1109/TCSII.2022.3188567.
S. Mohaghegh, G. Yemişçioglu and A. Muhtaroğlu, “Low-Power and Area-Efficient Finite Field Multiplier Architecture Based on Irreducible All-One Polynomials," 2020 IEEE International Symposium on Circuits and Systems (ISCAS), 2020, pp. 1-5, doi: 10.1109/ISCAS45731.2020.9181179.
G. Yemiscioglu, and P. Lee, “Very-Large-Scale Integration Implementation of a 16-bit Clocked Adiabatic Logic Logarithmic Signal Processor," in IET Computers and Digital Techniques, 2015, 9: 239-247, doi: 10.1049/IET-CDT.2014.0102.
G. Yemiscioglu and P. Lee, “16-Bit Clocked Adiabatic Logic (CAL) logarithmic signal processor," 2012 IEEE 55th International Midwest Symposium on Circuits and Systems (MWSCAS), 2012, pp. 113-116, doi: 10.1109/MWSCAS.2012.6291970.
G. Yemiscioglu and P. Lee, “16-Bit Clocked Adiabatic Logic (CAL) Leading One Detector for a Logarithmic Signal Processor," PRIME 2012; 8th Conference on Ph.D. Research in Microelectronics & Electronics, 2012, pp. 1-4.
